1OS View of Main MemoryProgram must be brought into memory and placed within a process for it to be executed.Input queuecollection of processes on the disk that are waiting to be brought into memory for execution.User programs go through several steps before being executed.Binding of Instructions and DataBinding:
A mapping from one address space to anotherBinding a symbolic address to a relocatableBinding a relocatableaddress to an absolute addressAddress binding of instructions and data to memory addresses can happen at three different stages.Compile time:
If memory location known a priori, absolute code can be generated; If starting address changes, need to recompile.Load time:
Compiler generates relocatablecode if memory location is not known at compile time.
Address assigned as loaded; If starting address Logical vs.Physical Address SpaceThe concept of a logical address spacethat is bound to a separate physicaladdress spaceis central to proper memory management.Logical addressgenerated by the CPU; also referred to as virtual address.Physical addressaddress seen by the memory unit.Virtual and physical addresses are the same in compiletime and load-time address-binding schemesVirtual and physical addresses differ in executiontime address-binding scheme.MemoryManagement Unit (MMUHardware device that maps virtual to physical address.In MMU scheme, the value in the base register is added to every address generated by a user process (offset) at the time it is sent to memory.The user program deals with virtualaddresses; it never sees the realphysical addresses.SwappingA process can be swappedtemporarily out of memory to a backing store, and then brought back into memory for continued execution.Backing store fast disk large enough to accommodate copies of all memory images for all users; must provide direct access to these memory images.Major part of swap time is transfer time; total transfer time is directly proportional to the amountof memory swapped.Modified versions of swapping are found on Schematic View of Swapping2Contiguous AllocationMain memory usually into two partitions:Resident operating system, usually held in low memory with interrupt vector.User processes then held in high memory.partition allocationregister scheme used to protect user processes from each other, and from changing operatingsystem code and data.Relocation register contains value of smallest physical address; limit register contains range of logical addresses each logical address must be less than the limit register.Contiguous Allocation (Cont.)partition allocationblock of available memory; holes of various size are scattered throughout memory.When a process arrives, it is allocated memory from a hole large enough to accommodate it
.Operating system maintains information about:a) allocated partitions
Allocate the smallesthole that is big enough; must search entire list, unless ordered by size.
Produces the smallest leftover hole.:
Allocate the largesthole; must also search entire list.
Produces the largest leftover hole.How to satisfy a request of size nfrom a list of free holes.Firstfit and best-fit better than worst-fit in terms of speed and storage utilization.FragmentationExternal fragmentation total memory space exists to satisfy a request, but it is not contiguous.Internal fragmentation allocated memory may be slightly larger than requested memory; this size difference is memory internal to a partition, but not being used.Reduce external fragmentation by compactionShuffle memory contents to place all free memory together in one large block.Compaction is possible onlyif relocation is dynamic (binding at exec time).PagingDivide physical memory into fixed-sized blocks called frames (size is power of 2, between 512 bytes and 8192 bytes).Divide logical memory into blocks of same size called pages.Logical address space of a process can be noncontiguous; process is allocated physical memory whenever the latter is available.Keep track of all free frames.To run a program of size n pages, need to find nfree frames and load program.Address Translation SchemeAddress generated by CPU is divided into:Page number(p)used as an index into a pagewhich contains base address of each page in physical memory.Page offset(d)combined with base address to define the physical memory address that is sent to the memory unit.3Address Translation Architecture Paging Example Implementation of Page TablePage table is kept in main memory.base register (PTBR) points to the page table.In this scheme every data/instruction access requires two memory accesses.
One for the page table and one for the data/instruction.The two memory access problem can be solved by the use of a special fast-lookup hardware cache called associative registersor translation look-aside buffers(TLBs)Associative Register or TLBAssociative registers parallel search Address translation (A, A)If A is in associative register, get frame # out.Otherwise get frame # from page table in memoryPage #Frame #Memory ProtectionMemory protection implemented by associating protection bit with each frame.bit attached to each entry in the page table:valid indicates that the associated page is in the process logical address space, and is thus a legal page.invalid indicates that the page is not in the process logical address space.For multiple processes, associate a
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